S.No | TITLE & AUTHORS | Page No |
---|---|---|
1 | Low Power Tolerant Non Volatile Lookup Table Design Authors: G.KSowjanya, V.Ramadasu | 1-4 |
2 | Implementation of UART with BIST Technique in FPGA Authors: THOTTARAMUDI USHA, L.V.V.DIVYA | 5-11 |
3 | Low Power, High Throughput, and Low Area Adaptive Fir Filter Based on Distributed Arithmetic Authors: SALAGALA JAYA SREE, P.SANDHYA RANI | 12-13 |
4 | High Speed Modified Booth Encoder for Signed and Unsigned Numbers Authors: SIMHADRI LAKSHMI LAVANYA, P.SRIDHAR REDDY | 14-21 |